View DG421DJ_94395.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

19-0137; Rev 1; 3/94
Improved Low-Power, CMOS Analog Switches with Latches
_______________General Description
Maxim's redesigned DG421/DG423/DG425 monolithic analog switches now feature guaranteed on-resistance matching (3 max) between switches and on-resistance flatness over the signal range (4 max). These low onresistance switches (20 typ) conduct equally well in both directions. They guarantee a low charge injection of 15pC maximum and an ESD tolerance of 2000V minimum per Method 3015.7. Off leakage current over temperature has also been reduced (less than 5nA at +85C). The DG421/DG423/DG425 are precision, dual CMOS switches with latchable logic inputs that simplify interfacing with microprocessors (Ps). The single-pole/singlethrow DG421 and double-pole/single-throw DG425 are normally open dual switches. The dual, singlepole/double-throw DG423 has two normally open and two normally closed switches. Fast switching times (175ns for t ON and 145ns for t OFF ) and low power consumption (35W max) make these parts ideal for battery-powered applications requiring P-compatible switches. Operation is from a single +10V to +30V supply, or bipolar 4.5V to 20V supplies. Fabricated with the same 44V silicon-gate process, these switches have rail-to-rail signal handling capabilities.
______________________New Features
o Plug-In Upgrades for Industry-Standard DG421/DG423/DG425 o Improved r(DS)ON Match Between Channels (3 max) o Guaranteed rFLAT(ON) Over Signal Range (4 max) o Improved Charge Injection (15pC max) o Improved Off Leakage Current Over Temperature (<5nA at +85C) o Withstands Electrostatic Discharge (2000V min) per Method 3015.7
DG421/DG423/DG425
__________________Existing Features
o Low rDS(ON) (35 max) o Single-Supply Operation +10V to +30V Bipolar-Supply Operation 4.5V to 20V o Low Power Consumption (35W max) o Rail-to-Rail Signal Handling Capability o TTL/CMOS-Logic Compatible
______________Ordering Information
PART DG421CJ DG421CY DG421C/D DG421DJ DG421DY DG421DK DG421AK TEMP. RANGE 0C to +70C 0C to +70C 0C to +70C -40C to +85C -40C to +85C -40C to +85C -55C to +125C PIN-PACKAGE 16 Plastic DIP 16 SO Dice* 16 Plastic DIP 16 SO 16 CERDIP 16 CERDIP**
_______________________Applications
Sample-and-Hold Circuits Fax Machines Battery-Operated Systems Guidance and Control Systems Audio Signal Routing Modems Test Equipment PBX, PABX Military Radios Communication Systems
Ordering Information continued at end of data sheet. * Contact factory for dice specifications. **Contact factory for availability and processing to MIL-STD-883B.
__Functional Diagrams/Truth Tables
S1 WR IN1 D IN2 D RS S2 CK R Q D2 CK R Q DG421 TRUTH TABLE WR RS IN SWITCH D1
_________________Pin Configurations
TOP VIEW
D1 1 WR 2 N.C. 3 N.C. 4 N.C. 5 N.C. 6 RS 7 D2 8 16 S1 15 IN1 14 V-
DG421
13 GND 12 V L 11 V+ 10 IN2 9 S2
DG421
0
1
0 1
Off On
LOGIC "O" 0.8V LOGIC "1" 2.4V SWITCHES SHOWN FOR LOGIC "1" INPUT
TWO SPST SWITCHES PER PACKAGE
Functional Diagrams/Truth Tables continued at end of data sheet.
DIP N.C. = No Internal Connection Pin Configurations continued at end of data sheet. 1
________________________________________________________________ Maxim Integrated Products
Call toll free 1-800-998-8800 for free samples or literature.
Improved Low-Power, CMOS Analog Switches with Latches DG421/DG423/DG425
ABSOLUTE MAXIMUM RATINGS
Voltage Referenced to VV+ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44V GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25V VL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . (GND - 0.3V) to (V+ + 0.3V) Digital Inputs, VS, VD (Note 1) . . . . . . . . . . . . . . (V- - 2V) to (V+ + 2V) Current (any terminal, except S or D) .................................30mA Continuous Current, S or D .................................................20mA Peak Current, S or D (pulsed at 1ms, 10% duty cycle max)...100mA Continuous Power Dissipation (TA = +70C) 16-Pin Plastic DIP (derate 10.53mW/C above +70C) . . .842mW 20-Pin PLCC (derate 10.00mW/C above +70C) . . . . . 800mW 16-Pin CERDIP (derate 10.00mW/C above +70C) . . . 800mW Operating Temperature Ranges DG42_C_ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0C to +70C DG42_D_ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40C to +85C DG42_A_ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -55C to +125C Storage Temperature Ranges DG42_C_/DG42_D_ . . . . . . . . . . . . . . . . . . . . . . . . . . . -65C to +125C DG42_A_ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65C to +150C Lead Temperature (soldering, 10sec). . . . . . . . . . . . . . . . . . . . +300C
Note 1: Signals on S, D, or IN exceeding V+ or V- are clamped by internal diodes. Limit forward current to maximum current ratings.
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(V+ = 15V, V- = -15V, VL = +5V, GND = 0V, VINH = +2.4V, VINL = +0.8V, TA = TMIN to TMAX, unless otherwise noted.) PARAMETER SWITCH Analog Signal Range Drain-Source On-Resistance VANALOG (Note 3) V+ = 13.5V, V- = -13.5V, IS = -10mA, VD = 10V V+ = 16.5V, V- = -16.5V, IS = -10mA, VD = 10V V+ = 15V, V- = -15V, IS = -10mA, VD = 5V V+ = 16.5V, V- = -16.5V, VD = 15.5V, VS = m 15.5V V+ = 16.5V, V- = -16.5V, VD = 15.5V, VS = m 15.5V V+ = 16.5V, V- = -16.5V, VD = 15.5V, VS = 15.5V TA = +25C TA = TMIN to TMAX TA = +25C TA = TMIN to TMAX TA = +25C TA = TMIN to TMAX TA = +25C TA = TMIN to TMAX TA = +25C TA = TMIN to TMAX TA = +25C TA = TMIN to TMAX -0.50 -0.01 -5 -0.50 -0.01 -5 -1.0 -10 -0.04 -15 20 15 45 45 3 4 4 5 0.50 5 0.50 5 1.0 10 -0.25 -0.01 -10 -0.25 -0.01 -10 -0.40 -0.04 -20 -15 20 15 35 45 3 4 4 5 0.25 nA 10 0.25 nA 10 0.40 nA 20 V SYMBOL CONDITIONS DG42_C, DG42_D MIN TYP MAX (Note 2) MIN DG42_A TYP MAX (Note 2) UNITS
rDS(ON)
On-Resistance Match Between Channels (Note 4)
rDS(ON)
On-Resistance Flatness (Note 4)
rFLAT(ON)
Source-Off Leakage Current (Note 5) Drain-Off Leakage Current (Note 5) Drain-On Leakage Current (Note 5) 2
IS(OFF)
ID(OFF)
ID(ON)
_______________________________________________________________________________________
Improved Low-Power, CMOS Analog Switches with Latches
ELECTRICAL CHARACTERISTICS (continued)
(V+ = 15V, V- = -15V, VL = +5V, GND = 0V, VINH = +2.4V, VINL = +0.8V, TA = TMIN to TMAX, unless otherwise noted.) PARAMETER INPUT Input Current with Input Voltage High Input Current with Input Voltage Low SUPPLY Power Supply Range Positive Supply Current SYMBOL CONDITIONS MIN TYP MAX (Note 2) 0.005 0.005 0.50 0.50 20 0.01 1.0 A -5.0 -1.0 -5.0 -1.0 -5.0 -1.0 -5.0 150 -0.01 -0.01 -0.01 5.0 1.0 A 5.0 1.0 A 5.0 1.0 A 5.0 250 300 200 UNITS
DG421/DG423/DG425
IINH IINL V+, VI+
IN = 2.4V, all others = 0.8V IN = 0.8V, all others = 2.4V (Note 3) All channels on or off, V+ = 16.5V, V- = -16.5V, VIN = 0V or 5V All channels on or off, V+ = 16.5V, V- = -16.5V, VIN = 0V or 5V All channels on or off, V+ = 16.5V, V- = -16.5V, VIN = 0V or 5V All channels on or off, V+ = 16.5V, V- = -16.5V, VIN = 0V or 5V
-0.50 -0.50 4.5 TA = +25C TA = TMIN to TMAX TA = +25C TA = TMIN to TMAX TA = +25C TA = TMIN to TMAX TA = +25C TA = TMIN to TMAX TA = +25C TA = TMIN to TMAX TA = +25C TA = -55C to +125C TA = +25C TA = -55C to +125C TA = +25C TA = -55C to +125C TA = +25C TA = +25C TA = +25C TA = +25C TA = +25C TA = +25C TA = +25C TA = +25C 200 200 100 100 60 100 5 -1.0
A A V
Negative Supply Current
I-
Logic Supply Current
IL
Ground Current DYNAMIC Turn-On Time Turn-Off Time
IGND
tON tOFF tWW
Figure 2 Figure 2 VS = 10V, RL = 300, CL = 35pF, Figure 3 DG423, Figure 4 CL = 10nF, VG = 0V, RG = 0, Figure 5 RL = 100, CL = 5pF, f = 1MHz, Figure 6 RL = 50, CL = 5pF, f = 1MHz, Figure 7
ns ns
Latch Timing
tDW tWD
ns
Break-Before-Make Interval (Note 3) Charge Injection (Note 3) Off-Isolation Rejection Ratio (Note 6) Crosstalk (Note 7) Drain-Off Capacitance Source-Off Capacitance Drain-On Capacitance Source-On Capacitance
tD Q OIRR
25 10 72 90 12 12 39 39 15
ns pC dB dB pF pF pF pF
CD(OFF) CS(OFF) CD(ON) CS(ON)
f = 1MHz, Figure 8 f = 1MHz, Figure 8 f = 1MHz, Figure 9 f = 1MHz, Figure 9
Note 2: Typical values are for design aid only, are not guaranteed, and are not subject to production testing. The algebraic convention, where the most negative value is a minimum and the most positive value a maximum, is used in this data sheet. Note 3: Guaranteed by design. Note 4: On-resistance match between channels and flatness are guaranteed only with bipolar-supply operation. Flatness is defined as the difference between the maximum and minimum value of on-resistance as measured at the extremes of the specified analog signal range. Note 5: Leakage parameters IS(OFF), ID(OFF), and ID(ON) are 100% tested at the maximum rated hot temperature and guaranteed by correlation at +25C. Note 6: Off-Isolation Rejection Ratio = 20log (VD/VS), VD = output, VS = input to off switch. Note 7: Between any two switches.
_______________________________________________________________________________________
3
Improved Low-Power, CMOS Analog Switches with Latches DG421/DG423/DG425
__________________________________________Typical Operating Characteristics
(TA = +25C, unless otherwise noted.)
ON-RESISTANCE vs. VD (DUAL-SUPPLIES)
MAX401-1
ON-RESISTANCE vs. VD AND TEMPERATURE (DUAL SUPPLIES)
MAX401-2
ON-RESISTANCE vs. VD (SINGLE SUPPLY)
V- = 0V 120 100 rDS (ON) () 80 60 V+ = 10V 40
MAX401-3
55 50 45 40 rDS (ON) () 35 30 25 20 15 10 5
A: B: C: D:
V+ = 5V, V- = -5V V+ = 10V, V- = -10V V+ = 15V, V- = -15V V+ = 20V, V- = -20V
35 30 25 rDS (ON) () 20 15 TA = -55C TA = +125C TA = +85C TA = +25C
140
A
V+ = 5V
B C D
10 V+ = 15V, V- = -15V 5 -20 -10 0 VD (V) 10 20 -20 -10 0 VD (V) 10 20
V+ = 15V 0 5 10 VD (V) 15
V+ = 20V 20
20
ON-RESISTANCE vs. VD AND TEMPERATURE (SINGLE SUPPLY)
MAX401-4
OFF LEAKAGE CURRENTS vs. TEMPERATURE
V+ = 16.5V V- = -16.5V VD = 15V VS = 15V
MAX401-5
ON LEAKAGE CURRENTS vs. TEMPERATURE
V+ = 16.5V V- = -16.5V VD = 15V VS = 15V
MAX401-6
70 60 TA = +125C
100 10 OFF LEAKAGE (nA) 1 0.1 0.01
100 10 ON LEAKAGE (nA) 1 0.1 0.01
50 rDS (ON) () 40 30 20 V+ = 12V, V- = 0V 10 0 5 10 VD (V)
TA = +85C TA = +25C
0.001 0.0001 15 20 -75 25 TEMPERATURE (C) 125
0.001 0.0001 -75 25 TEMPERATURE (C) 125
CHARGE INJECTION vs. ANALOG VOLTAGE
MAX401-7
SUPPLY CURRENT vs. TEMPERATURE
MAX401-8
60 40 20 Q (pC) 0 -20 -40 V+ = 15V, V- = -15V -60 -20 -10 0 VD (V) 10
100 10 1 0.1 0.01 0.001 0.0001
I+, I-, IL (A)
I+ at V+ = 16.5V I- at V- = -16.5V IL at VL = 5V
20
-75
25 TEMPERATURE (C)
125
4
_______________________________________________________________________________________
Improved Low-Power, CMOS Analog Switches with Latches
___________________Pin Descriptions
DG421 PIN 1, 8 2 3, 4, 5, 6 7 9, 16 10, 15 11 12 13 14 NAME D1, D2 --- -- - WR N.C. -- -- -- RS S1, S2 IN1, IN2 V+ VL GND VFUNCTION Drain Terminals Write Select No Internal Connection Reset Select Source Terminals Input Control Positive Supply Logic Supply Ground Negative Supply DG423/DG425 DIP 1, 8, 3, 6 2 PLCC 2, 10, 4, 8 3 NAME D1-D4 --- -- - WR S1-S4 -- -- -- RS IN1, IN2 V+ VL N.C. VGND FUNCTION Drain Terminals Write Select Source Terminals Resets Select Input Control Positive Supply Logic Supply No Internal Connection Negative Supply Ground
V+
__________Applications Information
Operation with Supply Voltages Other Than 15V
The DG421/DG423/DG425 switches operate with 4.5V to 20V bipolar supplies or with a +10V to +30V single supply. In either case, analog signals ranging from V+ to V- can be switched. The Typical Operating Characteristics graphs illustrate typical analog-signal and supply-voltage on-resistance variations. The usual on-resistance temperature coefficient is 0.5%/C (typ).
DG421/DG423/DG425
Logic Inputs
These devices operate with a single positive supply or with bipolar supplies. They maintain TTL compatibility with supplies anywhere in the 4.5V to 20V range as long as VL = +5V. If VL is connected to V+ or another supply at voltages other than +5V, the devices will operate at CMOS-logic-level inputs.
Overvoltage Protection
Proper power-supply sequencing is recommended for all CMOS devices. Do not exceed the absolute maximum ratings because stresses beyond the listed ratings may cause permanent damage to the devices. Always sequence V+ on first, followed by VL, V-, and logic inputs. If power-supply sequencing is not possible, add two small, external signal diodes in series with supply pins for overvoltage protection (Figure 1). Adding diodes reduces the analog signal range to 1V below V+ and 1V above V-, without affecting low switch resistance and low leakage characteristics. Device operation is unchanged, and the difference between V+ and V- should not exceed +44V.
16, 9, 4, 5 20, 12, 5, 7 7 15, 10 11 12 -- 14 13 9 19, 13 14 15 1, 6, 11, 16 18 17
S
D
Vg
V-
Figure 1. Overvoltage Protection Using External Blocking Diodes
_______________________________________________________________________________________
5
Improved Low-Power, CMOS Analog Switches with Latches DG421/DG423/DG425
______________________________________________Timing Diagrams/Test Circuits
VOUT is the steady-state output with the switch on. Feedthrough via switch capacitance may result in spikes at the leading and trailing edge of the output waveform.
LOGIC INPUT
3V 50% 0V
tR < 20ns tF < 20ns
+5V VL
+15V V+ S RL
DG421 DG423 DG425
SWITCH OUTPUT VOUT CL
tOFF VOUT
VD = 10V for tON VD = -10V for tOFF
D
0.9 x VOUT LOGIC INPUT 0.9 x VOUT
IN GND V-
SWITCH OUTPUT
0V
tON -VOUT
-15V REPEAT TEST FOR IN2 AND S2.
VOUT = VD
L ( RL + rDS(ON))
R
*VD = 10V for tON, VD = -10V for tOFF NOTE: LOGIC INPUT WAVEFORM IS INVERTED FOR SWITCHES THAT HAVE THE OPPOSITE LOGIC SENSE.
CL INCLUDES FIXTURE AND STRAY CAPACITANCE.
Figure 2. Switching Time
3V WR 0 tWW tDW 3V IN 0 2.0V 0.8V tWD 1.5V
3V RS 0 SWITCH VOUT 0 OUTPUT 1.5V tRS tOFF(RS)
0.8 x VOUT
Figure 3. Latch Timing
6
_______________________________________________________________________________________
Improved Low-Power, CMOS Analog Switches with Latches
_________________________________Timing Diagrams/Test Circuits (continued)
3V LOGIC INPUT 50% 0V VOUT1 SWITCH OUTPUT 1 0.9 x VOUT 0V LOGIC INPUT VOUT2 SWITCH OUTPUT 2 0.9 x VOUT -15V CL INCLUDES FIXTURE AND STRAY CAPACITANCE. 0V tD tD RL = 1000 CL = 35pF VD = 10V VD = 10V D D IN WR GND VVL RS V+ S S RL2 300 VOUT2 CL2 35pF RL1 300 CL1 35pF +5V +15V
DG421/DG423/DG425
DG423
VOUT1
Figure 4. DG423 Break-Before-Make Interval
+5V VOUT VOUT Rg S RS VL +15V V+ D
DG421 DG423 DG425
VOUT CL 10nF
IN
0FF
0N
0FF
Vg GND WR IN V-
Q = VOUT x CL IN DEPENDENT ON SWITCH CONFIGURATION. INPUT POLARITY DETERMINED BY SENSE OF SWITCH. VIN = 3V
-15V
Figure 5. Charge Injection
10nF SIGNAL GENERATOR VS IN 0V or 2.4V +15V +5V RS VL
D
V+
DG421 DG423 DG425
NETWORK ANALYZER RL
VD
S GND WR V-
-15V
10nF
Figure 6 . Off-Isolation Rejection Ratio
_______________________________________________________________________________________ 7
Improved Low-Power, CMOS Analog Switches with Latches DG421/DG423/DG425
_________________________________Timing Diagrams/Test Circuits (continued)
10nF +15V +5V
SIGNAL GENERATOR
V+ D
RS
VL
S
50
DG421 DG423 DG425
0V or 2.4V NETWORK ANALYZER RL
IN
IN D GND WR V-15V 10nF
0V or 2.4V N.C.
S
Figure 7. Crosstalk
10nF
+15V V+ D RS
+5V VL
DG421 DG423 DG425
IN CAPACITANCE METER
10nF
+15V V+ D RS
+5V VL
DG421 DG423 DG425
IN
CAPACITANCE METER S GND WR V-
0V or 2.4V
0V or 2.4V
S GND WR 10nF V10nF
-15V
-15V
Figure 8. Drain/Source-Off Capacitance
Figure 9. Drain/Source-On Capacitance
8
_______________________________________________________________________________________
Improved Low-Power, CMOS Analog Switches with Latches
_____________________________________________Pin Configurations (continued)
N.C. D1 S1
DG421/DG423/DG425
TOP VIEW
3 D1 1 WR 2 D3 3 S3 4 S4 5 D4 6 RS 7 D2 8 16 S1 15 IN1 14 VD3 S3 N.C. S4 D4 4 5 6 7 8 9 RS
2
1
20
19
IN1
WR
18 17
VGND N.C. VL V+
DG423 DG425
13 GND 12 V L 11 V+ 10 IN2 9 S2
DG423 DG425
16 15 14
DIP
10 D2
11 N.C.
12 S2 Off On
13 IN2 D1 D3 D2 D4
PLCC
N.C. = No Internal Connection
_____________________________Functional Diagrams/Truth Tables (continued)
S1 S3 WR IN1 RS IN2 CK Q D1 D3 S1 S3 WR IN1 RS CK DR Q
DRQ
DG423
DRQ CK Q D2 D4
IN2
DG425
DRQ CK
S2 S4
S2 S4
TWO SPDT SWITCHES PER PACKAGE DG423 TRUTH TABLE WR 0 RS 1 IN 0 1 SWITCH 1, 2 Off On LOGIC "O" 0.8V LOGIC "1" 2.4V IN X X X X SWITCH 3, 4 On Off
TWO DPST SWITCHES PER PACKAGE DG425 TRUTH TABLE WR RS IN SWITCH 0 1 0 1
LATCH OPERATION TRUTH TABLE RS WR 1 1 0 X X 0 LATCH/SWITCH X Latch operation transparent. Control data latched in. Switches on or off as selected by last IN. All latches reset. Switches on or off as when IN = 0, WR = 0, RS = 1.
LOGIC "O" 0.8V LOGIC "1" 2.4V
_______________________________________________________________________________________
9
Improved Low-Power, CMOS Analog Switches with Latches DG421/DG423/DG425
_Ordering Information (continued)
PART DG423CJ DG423CY DG423C/D DG423DJ DG423DY DG423DN DG423DK DG423AK DG425CJ DG425CY DG425C/D DG425DJ DG425DY DG425DN DG425DK DG425AK TEMP. RANGE 0C to +70C 0C to +70C 0C to +70C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -55C to +125C 0C to +70C 0C to +70C 0C to +70C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -55C to +125C PIN-PACKAGE 16 Plastic DIP 16 SO Dice* 16 Plastic DIP 16 SO 20 PLCC 16 CERDIP 16 CERDIP** 16 Plastic DIP 16 SO Dice* 16 Plastic DIP 16 SO 20 PLCC 16 CERDIP 16 CERDIP**
* Contact factory for dice specifications. **Contact factory for availability and processing to MIL-STD-883B.
___________________________________________________________Chip Topographies
DG421 DG421
WR D1 S1 IN1 WR
DG423 DG423/DG425
D1 S1 IN1
N.C. VN.C. N.C. N.C. GND VL VL V+ 0.105" (2.66mm)
D3 VS3 S4 D4 GND VL VL V+ 0.105" (2.66mm)
RS
RS
D2 0.082" (2.08mm)
S2
IN2
D2 0.082" (2.08mm)
S2
IN2
TRANSISTOR COUNT: 100 SUBSTRATE CONNECTED TO V+ 10
TRANSISTOR COUNT: 100 SUBSTRATE CONNECTED TO V+
______________________________________________________________________________________
Improved Low-Power, CMOS Analog Switches with Latches
________________________________________________________Package Information
D1
DIM A A1 A2 A3 B B1 C D D1 E E1 e eA eB L INCHES MAX MIN 0.200 - - 0.015 0.150 0.125 0.080 0.055 0.022 0.016 0.065 0.050 0.012 0.008 0.765 0.745 0.030 0.005 0.325 0.300 0.280 0.240 0.100 BSC 0.300 BSC 0.400 - 0.150 0.115 15 0 MILLIMETERS MIN MAX - 5.08 0.38 - 3.18 3.81 1.40 2.03 0.41 0.56 1.27 1.65 0.20 0.30 18.92 19.43 0.13 0.76 7.62 8.26 6.10 7.11 2.54 BSC 7.62 BSC - 10.16 2.92 3.81 0 15
21-587A
DG421/DG423/DG425
E D A3 A A2 E1
L A1 e B
C B1 eA eB
16-PIN PLASTIC DUAL-IN-LINE PACKAGE
DIM
S1
S
E1 A D E
A B B1 C D E E1 e L L1 Q S S1
INCHES MAX MIN 0.200 - 0.023 0.014 0.065 0.038 0.015 0.008 0.840 - 0.310 0.220 0.320 0.290 0.100 BSC 0.200 0.125 - 0.150 0.060 0.015 0.080 - - 0.005 15 0
MILLIMETERS MIN MAX - 5.08 0.36 0.58 0.97 1.65 0.20 0.38 - 21.34 5.59 7.87 7.37 8.13 2.54 BSC 3.18 5.08 3.81 - 0.38 1.52 - 2.03 0.13 - 0 15
21-590B
Q L e B B1 L1
C
16-PIN CERAMIC DUAL-IN-LINE PACKAGE
______________________________________________________________________________________
11
Improved Low-Power, CMOS Analog Switches with Latches DG421/DG423/DG425
___________________________________________Package Information (continued)
DIM A A1 A2 A3 B B1 C D D1 D2 D3 e INCHES MAX MIN 0.180 0.165 0.110 0.100 0.156 0.145 - 0.020 0.021 0.013 0.032 0.026 0.011 0.009 0.395 0.385 0.355 0.350 0.330 0.290 0.200 REF 0.050 REF MILLIMETERS MIN MAX 4.19 4.57 2.54 2.79 3.68 3.96 0.51 - 0.33 0.53 0.66 0.81 0.23 0.28 9.78 10.03 8.89 9.02 7.37 8.38 5.08 REF 1.27 REF
21-981A
A2 C
e B1 D1 D
B D2
D3 D1 D A1 A
A3
20-PIN PLASTIC LEADED CHIP CARRIER PACKAGE
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
12 __________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 (408) 737-7600 (c) 1994 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.

▲Up To Search▲

Price & Availability of DG421DJ

	To Download DG421DJ Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .